1. Field of the Invention
This invention relates to a semiconductor device manufacturing method, particularly to an etching method for preventing deformation of a via hole formed in a semiconductor substrate.
2. Description of the Related Art
CSP (Chip Size Package) has received attention in recent years as a three-dimensional mounting technology as well as a new packaging technology. The CSP means a small package having almost same outside dimensions as those of a semiconductor die packaged in it.
Conventionally, BGA (Ball Grid Array) type semiconductor device has been known as a kind of CSP. In this BGA type semiconductor device, a plurality of ball-shaped conductive terminals made of metal such as solder is arrayed in a grid pattern on one surface of the package, and electrically connected with the semiconductor die mounted on the other side of the package.
When this BGA type semiconductor device is mounted on electronic equipment, the semiconductor die is electrically connected with an external circuit on a printed circuit board by compression bonding of the ball-shaped conductive terminals to wiring patterns on the printed circuit board.
Such a BGA type semiconductor device has advantages in providing a large number of conductive terminals and in reducing size over other CSP type semiconductor devices such as SOP (Small Outline Package) and QFP (Quad Flat Package), which have lead pins protruding from their sides. The BGA type semiconductor device is used as an image sensor chip for a digital camera incorporated into a mobile telephone, for example. In some BGA type semiconductor devices, a supporting board made of, for example, a glass is bonded on a surface or both surfaces of the semiconductor die. The technology mentioned above is disclosed, for example, in the Japanese Patent Application Publication No. 2002-512436.
Next, description will be made on the BGA type semiconductor device manufacturing method in a case where a sheet of supporting board is bonded to the semiconductor die, with reference to the drawings.
FIGS. 7 to 9 are cross-sectional views of the BGA type semiconductor device manufacturing method of the conventional art, which is applicable to the image sensor chip.
First, as shown in FIG. 7, a pad electrode 32 made of an aluminum layer or an aluminum alloy layer is formed on a top surface of a semiconductor substrate 30 with a silicon oxide film 31 or a silicon nitride film interposed therebetween. Then, a supporting board 34 made of, for example, a glass is further bonded on the top surface of the semiconductor substrate 30 including the pad electrode 32 with an adhesive 33 made of an epoxy resin layer interposed therebetween.
Next, as shown in FIG. 8, a resist layer 35 is formed on a back surface of the semiconductor substrate 30, having an opening in a position corresponding to the pad electrode 32. Then, the semiconductor substrate 30 is dry-etched using this resist layer 35 as a mask, and the silicon oxide film 31 is further etched, thereby forming a via hole 36 from the back surface of the semiconductor substrate 30 to the pad electrode 32. This process employs an etching method having relatively high process speed for forming an opening having 130 μm depth, for example, in the semiconductor substrate 30 made of a Si wafer (e.g., an etching rate is 10 μm/min).
Then, as shown in FIG. 9, a barrier layer 37 is formed on the back surface of the semiconductor substrate 30, including inside the via hole 36 with an insulation film (not shown) and a surface of the pad electrode 32 A seed layer for plating 38 is formed on the barrier layer 37, and plating is performed to this seed layer 38 to form a re-distribution layer 39 made of, for example, copper (Cu). Furthermore, a protection layer (not shown) is formed on the re-distribution layer 39, and openings are formed in predetermined positions of the protection layer. Then, ball-shaped terminals 40 are formed in the openings, being contact with the re-distribution layer 39.
Then, although not shown, the semiconductor substrate and the layers laminated thereon are cut off and separated into individual semiconductor dice. In this way, the BGA type semiconductor device where the pad electrode 32 and the ball-shaped terminals 40 are electrically connected with each other is formed.
However, the forming process of the via hole 36 described above causes a problem such as deformation of the opening. That is, an etching shape shown in FIG. 10 is formed in the process shown in FIG. 8. Since the pad electrode 32 is formed on the semiconductor substrate 30 with the silicon oxide film 31 or the silicon nitride film interposed therebetween, when the via hole 36 is formed by etching from the back surface of the semiconductor substrate 31 to the pad electrode 32, the etching stops at the silicon oxide film 31 or the silicon nitride film at a bottom of the via hole. Then, when over-etching occurs, the etching proceeds in a lateral direction (notch is formed), thereby deforming the opening as shown in FIG. 10. This notch causes the silicon oxide film 31 or the silicon nitride film to be removed beyond the area of the surface of the pad electrode 32. Furthermore, the adhesion of the insulation film or the re-distribution layer to the via hole 36a having such a shape is degraded, thereby causing a conductive error and lowering reliability in connection with the pad electrode.
Although there is an etching process forming no notch, this process has a disadvantage of extremely low process speed (e.g. an etching rate is 5 μm/min or lower, or 2 to 1 μm/min in some cases). Therefore, this etching process can not be employed because of low productivity.